AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 555

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

35.7.1
6462A–ATARM–03-Jun-09
Command - Response Operation
in an operation. The bits on the DAT and the CMD lines are transferred synchronous to the clock
MCI Clock.
Two types of data transfer commands are defined:
Both read and write operations allow either single or multiple block transmission. A multiple
block transmission is terminated when a stop command follows on the CMD line similarly to the
sequential read or when a multiple block transmission has a pre-defined block count
Transfer Operation” on page
The MCI provides a set of registers to perform the entire range of MultiMedia Card operations.
After reset, the MCI is disabled and becomes valid after setting the MCIEN bit in the MCI_CR
Control Register.
The PWSEN bit saves power by dividing the MCI clock by 2
The two bits, RDPROOF and WRPROOF in the MCI Mode Register (MCI_MR) allow stopping
the MCI Clock during read or write access if the internal FIFO is full. This will guarantee data
integrity, not bandwidth.
The command and the response of the card are clocked out with the rising edge of the MCI
Clock.
All the timings for MultiMedia Card are defined in the MultiMediaCard System Specification.
The two bus modes (open drain and push/pull) needed to process all the operations are defined
in the MCI command register. The MCI_CMDR allows a command to be carried out.
For example, to perform an ALL_SEND_CID command:
The command ALL_SEND_CID and the fields and values for the MCI_CMDR Control Register
are described in
Table 35-6.
Note:
CMD
CMD Index
CMD2
• Sequential commands: These commands initiate a continuous data stream. They are
• Block-oriented commands: These commands send a data block succeeded by CRC bits.
terminated only when a stop command follows on the CMD line. This mode reduces the
command overhead to an absolute minimum.
bcr means broadcast command with response.
S
T
ALL_SEND_CID Command Description
bcr
Type
Table 35-6
Host Command
Content
Argument
[31:0] stuff bits
and
557.).
CRC
Table
E
35-7.
Z
N
Resp
R2
ID
******
Cycles
Abbreviation
ALL_SEND_CID
Z
S
PWSDIV
T
+ 1 when the bus is inactive.
AT91SAM9G10
Content
CID
Command
Description
Asks all cards to send
their CID numbers on
the CMD line
Z
(See “Data
Z
555
Z