AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 105

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

16. Periodic Interval Timer (PIT)
16.1
16.2
Figure 16-1. Periodic Interval Timer
16.3
6462A–ATARM–03-Jun-09
Prescaler
MCK
Description
Block Diagram
Functional Description
MCK/16
The Periodic Interval Timer (PIT) provides the operating system’s scheduler interrupt. It is
designed to offer maximum accuracy and efficient management, even for systems with long
response time .
The Periodic Interval Timer aims at providing periodic interrupts for use by operating systems.
The PIT provides a programmable overflow counter and a reset-on-read feature. It is built
around two counters: a 20-bit CPIV counter and a 12-bit PICNT counter. Both counters work at
Master Clock /16.
The first 20-bit CPIV counter increments from 0 up to a programmable overflow value set in the
field PIV of the Mode Register (PIT_MR). When the counter CPIV reaches this value, it resets to
0 and increments the Periodic Interval Counter, PICNT. The status bit PITS in the Status Regis-
ter (PIT_SR) rises and triggers an interrupt, provided the interrupt is enabled (PITIEN in
PIT_MR).
Counter
0
CPIV
CPIV
20-bit
0
1
PIT_PIVR
PIT_PIIR
PIT_MR
= ?
PIV
0
0
PICNT
Adder
12-bit
PICNT
1
PIT_SR
AT91SAM9G10
read PIT_PIVR
PITS
set
reset
PIT_MR
PITIEN
pit_irq
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