AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 190
AT91SAM9G10-EK
Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Specifications of AT91SAM9G10-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 190 of 730
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22.12.2
Figure 22-32. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
6462A–ATARM–03-Jun-09
internal signal from PMC
Switching from (to) Slow Clock Mode to (from) Normal Mode
Slow Clock Mode
NBS0, NBS1,
NBS2, NBS3,
A0,A1
This write cycle finishes with the slow clock mode set
A
[25:2]
NWE
MCK
NCS
of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters.See
page
Figure 22-33
other.
190. The external device may not be fast enough to support such timings.
SLOW CLOCK MODE WRITE
1
NWE_CYCLE = 3
illustrates the recommended procedure to properly switch from one mode to the
1
1
SLOW CLOCK MODE WRITE
1
1
Slow clock mode transition is detected:
1
Reload Configuration Wait State
2
NORMAL MODE WRITE
NWE_CYCLE = 7
AT91SAM9G10
3
2
Figure 22-32 on
190
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