AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 53

KIT DEV FOR SAM9G10 ARM

AT91SAM9G10-EK

Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT91SAM9G10-EK

Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
12. AT91SAM9G10 Debug and Test
12.1
12.2
6462A–ATARM–03-Jun-09
Overview
Block Diagram
The AT91SAM9G10 features a number of complementary debug and test capabilities. A com-
mon JTAG/ICE (In-Circuit Emulator) port is used for standard debugging functions, such as
downloading code and single-stepping through programs. The Debug Unit provides a two-pin
UART that can be used to upload an application into internal SRAM. It manages the interrupt
handling of the internal COMMTX and COMMRX signals that trace the activity of the Debug
Communication Channel.
A set of dedicated debug and test input/output pins gives direct access to these capabilities from
a PC-based test environment.
Figure 12-1. Debug and Test Block Diagram
TAP: Test Access Port
PDC
ARM9EJ-S
Boundary
ARM926EJ-S
Port
DBGU
ICE-RT
ICE/JTAG
TAP
Reset
Test
and
AT91SAM9G10
POR
TMS
TCK
TDI
JTAGSEL
TDO
DTXD
DRXD
NTRST
RTCK
TST
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