AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 450
AT91SAM9G10-EK
Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Specifications of AT91SAM9G10-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 450 of 730
- Download datasheet (12Mb)
32.6.6
Figure 32-36. Typical Connection to a RS485 Bus
Figure 32-37. Example of RTS Drive with Timeguard
6462A–ATARM–03-Jun-09
RS485 Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485
mode, the USART behaves as though in asynchronous or synchronous mode and configuration
of all the parameters is possible. The difference is that the RTS pin is driven high when the
transmitter is operating. The behavior of the RTS pin is controlled by the TXEMPTY bit. A typical
connection of the USART to a RS485 bus is shown in
The USART is set in RS485 mode by programming the USART_MODE field in the Mode Regis-
ter (US_MR) to the value 0x1.
The RTS pin is at a level inverse to the TXEMPTY bit. Significantly, the RTS pin remains high
when a timeguard is programmed so that the line can remain driven after the last character com-
pletion.
when the timeguard is enabled.
Baud Rate
TXEMPTY
US_THR
TXRDY
Clock
Write
TXD
RTS
Figure 32-37
USART
Start
Bit
D0
RXD
TXD
RTS
gives an example of the RTS waveform during a character transmission
D1
D2
D3
D4
D5
D6
D7
Parity
Bit
Stop
Bit
Differential
TG = 4
Bus
Figure
32-36.
AT91SAM9G10
450
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