AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 359

• Manufacturer Part Number: AT91SAM9G10-EK
• Description: KIT DEV FOR SAM9G10 ARM
• Manufacturer: Atmel
• Type: MCUr

Specifications of AT91SAM9G10-EK

• Contents: Board, Cables, Power Supply
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9G10, ARM926EJ-S
• Tool / Board Applications: Microcontroller
• Rohs Compliant: Yes
• For Use With/related Products: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

30.6.3.10
Figure 30-11. Peripheral Deselection
30.6.3.11
6462A–ATARM–03-Jun-09
Write SPI_TDR
Write SPI_TDR
Write SPI_TDR
NPCS[0..3]
NPCS[0..3]
NPCS[0..3]
TDRE
TDRE
TDRE
Peripheral Deselection with PDC
Mode Fault Detection
A
A
A
When the Peripheral DMA Controller is used, the chip select line will remain low during the
whole transfer since the TDRE flag is managed by the PDC itself. The reloading of the SPI_TDR
by the PDC is done as soon as TDRE flag is set to one. In this case the use of CSAAT bit might
not be needed. However, it may happen that when other PDC channels connected to other
peripherals are in use as well, the SPI PDC might be delayed by another (PDC with a higher pri-
ority on the bus). Having PDC buffers in slower memories like flash memory or SDRAM
compared to fast internal SRAM, may lengthen the reload time of the SPI_TDR by the PDC as
well. This means that the SPI_TDR might not be reloaded in time to keep the chip select line
low. In this case the chip select line may toggle between data transfer and according to some
SPI Slave devices, the communication might get lost. The use of the CSAAT bit might be
needed.
Figure 30-11
A mode fault is detected when the SPI is programmed in Master Mode and a low level is driven
by an external master on the NPCS0/NSS signal. In this case, multi-master configuration,
NPCS0, MOSI, MISO and SPCK pins must be configured in open drain (through the PIO control-
DLYBCT
DLYBCT
DLYBCT
CSAAT = 0
DLYBCS
DLYBCS
DLYBCS
PCS = B
PCS=A
shows different peripheral deselction cases and the effect of the CSAAT bit.
PCS = A
A
B
A
A
A
A
DLYBCT
DLYBCT
DLYBCT
CSAAT = 1
DLYBCS
DLYBCS
PCS = B
PCS = A
A
A
AT91SAM9G10
PCS = A
DLYBCS
A
A
B
359