AT91SAM9G10-EK Atmel, AT91SAM9G10-EK Datasheet - Page 388
AT91SAM9G10-EK
Manufacturer Part Number
AT91SAM9G10-EK
Description
KIT DEV FOR SAM9G10 ARM
Manufacturer
Atmel
Type
MCUr
Specifications of AT91SAM9G10-EK
Contents
Board, Cables, Power Supply
Silicon Manufacturer
Atmel
Core Architecture
AVR
Kit Contents
Board
Svhc
No SVHC (15-Dec-2010)
Mcu Supported Families
AT91SAM9G10, ARM926EJ-S
Tool / Board Applications
Microcontroller
Rohs Compliant
Yes
For Use With/related Products
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure 31-18. TWI Read Operation with Single Data Byte without Internal Address
388
AT91SAM9G10
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
Read Receive Holding Register
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
TWI_CR = START | STOP
Read ==> bit MREAD = 1
Set the Control register:
- Device slave address
- Transfer direction bit
Read Status register
Read status register
(Needed only once)
Start the transfer
- Master enable
Yes
TXCOMP = 1?
Yes
Set TWI clock
RXRDY = 1?
BEGIN
END
No
No
6462A–ATARM–03-Jun-09
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