HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 79

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Interrupt Request Register 1 (IRR1)
Note: * Only a write of 0 for flag clearing is possible.
IRR1 is an 8-bit read/write register, in which a corresponding flag is set to 1 when a timer B1,
timer A, timer Y, or IRQ
when an interrupt is accepted. It is necessary to write 0 to clear each flag. Upon reset, IRR1 is
initialized to H'10.
Bit 7—Timer B1 Interrupt Request Flag (IRRTB1)
Bit 7: IRRTB1
0
1
Bit 6—Timer A Interrupt Request Flag (IRRTA)
Bit 6: IRRTA
0
1
Bit 5—Reserved Bit: Bit 5 is reserved: it is always read as 0 and cannot be modified.
Bit 4—Reserved Bit: Bit 4 is reserved; it is always read as 1, and cannot be modified.
Bits 3 to 0—IRQ
Bit n: IRRIn
0
1
Bit
Initial value
Read/Write
3
IRRTB1
to IRQ
R/W*
Description
Clearing conditions:
When IRRTB1 = 1, it is cleared by writing 0
Setting conditions:
When the timer B1 counter value overflows from H'FF to H'00
Description
Clearing conditions:
When IRRTA = 1, it is cleared by writing 0
Setting conditions:
When the timer A counter value overflows from H'FF to H'00
Description
Clearing conditions:
When IRRIn = 1, it is cleared by writing 0
Setting conditions:
When pin IRQ
is input
7
0
3
to IRQ
0
Interrupt Request Flags (IRRI3 to IRRI0)
IRRTA
R/W*
6
0
0
n
interrupt is requested. The flags are not cleared automatically
is designated for interrupt input and the designated signal edge
—
—
5
0
—
—
4
1
IRRI3
R/W*
3
0
IRRI2
R/W*
2
0
IRRI1
R/W*
1
0
(initial value)
(initial value)
(initial value)
(n = 3 to 0)
IRRI0
R/W*
0
0
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