HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 343

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

SCI3 operates as follows when transmitting data.
SCI3 monitors bit TDRE in SSR, and when it is cleared to 0, recognizes that data has been written
to TDR and transfers data from TDR to TSR. It then sets bit TDRE to 1 and starts transmitting. If
bit TIE in SCR3 is set to 1 at this time, a TXI request is made.
Serial data is transmitted from the TXD pin using the relevant data transfer format in table 10.14.
When the stop bit is sent, SCI3 checks bit TDRE. If bit TDRE is cleared to 0, SCI3 transfers data
from TDR to TSR, and when the stop bit has been sent, starts transmission of the next frame. If bit
TDRE is set to 1, bit TEND in SSR is set to 1, and the mark state, in which 1s are transmitted, is
established after the stop bit has been sent. If bit TEIE in SCR3 is set to 1 at this time, a TEI
request is made.
Figure 10.23 shows an example of the operation when transmitting using the multiprocessor
format.
Multiprocessor Receiving: Figure 10.24 shows an example of a flowchart for multiprocessor data
reception. This procedure should be followed for multiprocessor data reception after initializing
SCI3.
Serial
data
TDRE
TEND
LSI
operation
User
processing
Figure 10.23 Example of Operation when Transmitting using Multiprocessor Format
TXI request
1
Start
bit
0
D0
TDRE
cleared to 0
Data written
to TDR
D1
(8-Bit Data, Multiprocessor Bit, 1 Stop Bit)
Transmit
1 frame
data
D7
MPB
0/1
TXI request
Stop
bit
1
Start
bit
0
D0
1 frame
D1
Transmit
data
D7
MPB
0/1
TEI request
Stop
bit
1
Mark
state
1
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