HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 13

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Table 1.1
Item
CPU
Interrupts
Clock pulse
generators
Power-down
modes
Note: * Values in parentheses are for the F-ZTAT version.
2
Features
Description
High-speed H8/300L CPU
33 interrupt sources
Two on-chip clock pulse generators
Seven power-down modes
General-register architecture
General registers: Sixteen 8-bit registers (can be used as eight 16-bit
registers)
Operating speed
Instruction set compatible with H8/300 CPU
Typical instructions
12 external interrupt sources (IRQ
21 internal interrupt sources
System clock pulse generator:
Crystal or ceramic resonator:
External clock input:
Sleep (high-speed) mode
Sleep (medium-speed) mode
Standby mode
Watch mode
Subsleep mode
Subactive mode
Active (medium-speed) mode
Max. operation speed: 5 MHz (mask ROM and ZTAT versions)
Add/subtract: 0.4 s (operating at ø = 5 MHz)
Multiply/divide: 2.8 s (operating at ø = 5 MHz)
Can run on 32.768 kHz subclock
Instruction length of 2 bytes or 4 bytes
Basic arithmetic operations between registers
MOV instruction for data transfer between memory and registers
Multiply (8 bits
Divide (16 bits
Bit accumulator
Register-indirect designation of bit position
0.25 s (operating at ø = 8 MHz)
1.75 s (operating at ø = 8 MHz)
8 bits)
8 bits)
8 MHz (F-ZTAT version)
1 to 10 MHz (1 to 16 MHz)*
2 to 10 MHz (2 to 16 MHz)*
1 to 10 MHz (1 to 16 MHz)*
3
to IRQ
0
, INT
7
to INT
0
)