HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 430

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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TCSRX—Timer control/status register X
426
Input capture flag A
Note: * Only a write of 0 for flag clearing is possible.
0 [Clearing condition]
1 [Setting condition]
Bit
Initial value
Read/Write
After reading ICFA = 1, cleared by writing 0 to ICFA
When the value of FRC is transferred to ICRA by the input
capture signal
Input capture flag B
0 [Clearing condition]
1 [Setting condition]
After reading ICFB = 1, cleared by writing 0 to ICFB
When the value of FRC is transferred to ICRB by the input
capture signal
Input capture flag C
0 [Clearing condition]
1 [Setting condition]
After reading ICFC = 1, cleared by writing 0 to ICFC
Set by input capture signal
R/(W)
ICFA
7
0
Input capture flag D
0 [Clearing condition]
1 [Setting condition]
*
After reading ICFD = 1, cleared by writing 0 to ICFD
Set by input capture signal
R/(W)
Output compare flag A
ICFB
0 [Clearing condition]
1 [Setting condition]
6
0
After reading OCFA = 1, cleared by writing 0 to OCFA
Set when FRC matches OCRA
*
Output compare flag B
0 [Clearing condition]
1 [Setting condition]
After reading OCFB = 1, cleared by writing 0 to OCFB
Set when FRC matches OCRB
R/(W)
ICFC
5
0
Timer overflow
0 [Clearing condition]
1 [Setting condition]
*
After reading OVF = 1, cleared by writing 0 to OVF
Set when the FRC value goes from H'FFFF to H'0000
R/(W)
ICFD
Counter clear A
0 FRC is not cleared by compare match A
1 FRC is cleared by compare match A
4
0
*
OCFA
R/(W)
3
0
*
H'F771
OCFB
R/(W)
2
0
*
R/(W)
OVF
1
0
*
CCLRA
Timer X
R/W
0
0

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