HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 290

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

10.2.2
Serial Control Register 1 (SCR1)
SCR1 is an 8-bit read/write register for selecting the operation mode, the transfer clock source,
and the prescaler division ratio.
Upon reset, SCR1 is initialized to H'00. Writing to this register during a transfer stops the transfer.
Bits 7 and 6—Operation Mode Select 1, 0 (SNC1, SNC0): Bits 7 and 6 select the operation
mode.
Bit 7: SNC1
0
1
Notes: 1. Pins SI
Bits 5—TAIL MARK Control (MRKON): Bit 5 controls TAIL MARK output after an 8- or 16-
bit data transfer.
Bit 5: MRKON
0
1
Bits 4—LATCH TAIL Select (LTCH): Bit 4 selects whether LATCH TAIL or HOLD TAIL is
output as TAIL MARK when bit MRKON is set to 1 (SSB mode).
Bit 4: LTCH
0
1
Bit 3—Clock Source Select (CKS3): Bit 3 selects the clock source and sets pin SCK
or output pin.
284
Bit
Initial value
Read/Write
2. Don’t set bits SNC1 and SNC0 to 11.
Register Descriptions
1
SNC1
R/W
Bit 6: SNC0
0
1
0
1
Description
TAIL MARK is not output (synchronous mode)
TAIL MARK is output (SSB mode)
Description
HOLD TAIL is output
LATCH TAIL is output
and SO
7
0
1
should be used as general input or output ports.
SNC0
R/W
6
0
MRKON
Description
8-bit synchronous transfer mode
16-bit synchronous transfer mode
Continuous clock output mode*
Reserved*
R/W
5
0
LTCH
R/W
2
4
0
CKS3
R/W
3
0
CKS2
R/W
1
2
0
CKS1
R/W
1
0
1
(initial value)
(initial value)
(initial value)
as an input
CKS0
R/W
0
0