HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 465

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

SYSCR2—System control register 2
Bit
Initial value
Read/Write
Note: Don’t care
Noise elimination sampling frequency select
0 Sampling rate is ø
1 Sampling rate is ø
Direct transfer on flag
*
0 • When a SLEEP instruction is executed in active mode, a transition is
1
• When a SLEEP instruction is executed in subactive mode, a transition is
• When a SLEEP instruction is executed in active (high-speed) mode, a direct
• When a SLEEP instruction is executed in active (medium-speed) mode, a direct
• When a SLEEP instruction is executed in subactive mode, a direct
Medium speed on flag
0 • Operates in active (high-speed) mode after exit from standby, watch, or sleep
1 • Operates in active (medium-speed) mode after exit from standby, watch,
made to standby mode, watch mode, or sleep mode
made to watch mode or subsleep mode
transition is made to active (medium-speed) mode if SSBY = 0, MSON = 1, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
transition is made to active (high-speed) mode if SSBY = 0, MSON = 0, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
transition is made to active (high-speed) mode if SSBY = 1, TMA3 = 1, LSON = 0,
and MSON = 0, or to active (medium-speed) mode if SSBY = 1, TMA3 = 1,
LSON = 0, and MSON = 1
• Operates in sleep (high-speed) mode if a SLEEP instruction is executed in
• Operates in sleep (medium-speed) mode if a SLEEP instruction is executed
mode
active mode
or sleep mode
in active mode
—
—
7
1
OSC
OSC
/16
/4
—
—
6
1
—
—
5
1
NESEL
R/W
4
0
DTON
R/W
3
0
H'FFF1
Subactive mode clock select
0
1
MSON
R/W
0
1
*
2
0
ø /8
ø /4
ø /2
W
W
W
R/W
SA1
1
0
System control
R/W
SA0
0
0
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