HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 341

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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There is a choice of four data transfer formats. If a multiprocessor format is specified, the parity
bit specification is invalid. See table 10.14 for details.
For details on the clock used in multiprocessor communication, see 10.3.4, Operation in
Synchronous Mode.
Multiprocessor Transmitting: Figure 10.22 shows an example of a flowchart for multiprocessor
data transmission. This procedure should be followed for multiprocessor data transmission after
initializing SCI3.
Serial
data
Figure 10.21 Example of Inter-Processor Communication Using Multiprocessor Format
Receiver A
(ID = 01)
Sender
(specifying the receiver)
ID transmission cycle
H'01
(Sending Data H'AA to Receiver A)
(MPB = 1)
Receiver B
(ID = 02)
Communication line
(sending data to the receiver
Data transmission cycle
specified buy the ID)
Receiver C
(ID = 03)
H'AA
(MPB = 0)
Receiver D
(ID = 04)
MPB: Multiprocessor bit
335

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