HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 25

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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2.1
The H8/300L CPU has sixteen 8-bit general registers, which can also be paired as eight 16-bit
registers. Its concise instruction set is designed for high-speed operation.
2.1.1
Features of the H8/300L CPU are listed below.
Note: * These values are at ø = 5 MHz.
General-register architecture
Sixteen 8-bit general registers, also usable as eight 16-bit general registers
Instruction set with 55 basic instructions, including:
Eight addressing modes
64-kbyte address space
High-speed operation
Low-power operation modes
SLEEP instruction for transfer to low-power operation
Multiply and divide instructions
Powerful bit-manipulation instructions
Register direct
Register indirect
Register indirect with displacement
Register indirect with post-increment or pre-decrement
Absolute address
Immediate
Program-counter relative
Memory indirect
All frequently used instructions are executed in two to four states
High-speed arithmetic and logic operations
8- or 16-bit register-register add or subtract: 0.4 s (operating at ø = 5 MHz)
8
16 8-bit divide:
Note: * F-ZTAT version only.
Overview
Features
8-bit multiply:
Section 2 CPU
0.25 s (operating at ø = 8 MHz)*
2.8 s (operating at ø = 5 MHz)
1.75 s (operating at ø = 8 MHz)*
2.8 s (operating at ø = 5 MHz)
1.75 s (operating at ø = 8 MHz)*
15

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