HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 414

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Table A.1
Notes: (1) Set to 1 when there is a carry or borrow from bit 11; otherwise cleared to 0.
A.2
Table A.2 is an operation code map. It shows the operation codes contained in the first byte of the
instruction code (bits 15 to 8 of the first instruction word).
410
JSR @@aa:8
RTS
RTE
SLEEP
LDC #xx:8, CCR
LDC Rs, CCR
STC CCR, Rd
ANDC #xx:8, CCR
ORC #xx:8, CCR
XORC #xx:8, CCR
NOP
EEPMOV
Mnemonic
(2) If the result is zero, the previous value of the flag is retained; otherwise the flag is
(3) Set to 1 if decimal adjustment produces a carry; otherwise retains value prior to
(4) The number of states required for execution is 4n + 9 (n = value of R4L).
(5) Set to 1 if the divisor is negative; otherwise cleared to 0.
(6) Set to 1 if the divisor is zero; otherwise cleared to 0.
Operation Code Map
cleared to 0.
arithmetic operation.
Instruction Set (cont)
B
B
B
B
B
B
SP–2
PC
PC
PC
SP+2
CCR
SP+2
PC
SP+2
Transit to sleep mode.
#xx:8
Rs8
CCR
CCR #xx:8
CCR #xx:8
CCR #xx:8
PC
if R4L 0
Repeat @R5
R5+1
R6+1
R4L–1
Until R4L=0
else next;
@SP
@aa:8
@SP
@SP
PC+2
CCR
Operation
@SP
Rd8
CCR
R5
R6
SP
SP
SP
SP
R4L
CCR
CCR
CCR
@R6
2
2
2
2
Instruction Length (Bytes)
2
2
Addressing Mode/
2
2
2
2 — — — — — —
2 — — — — — —
4 — — — — — —
— — — — — — 8
— — — — — —
— — — — — —
I H N Z V C
Condition Code
10
8
2
2
2
2
2
2
2
2
4

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