HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 314

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit Rate Register (BRR)
BRR is an 8-bit register that designates the transmit/receive bit rate in accordance with the baud
rate generator operating clock selected by bits CKS1 and CKS0 of the serial mode register (SMR).
BRR can be read or written by the CPU at any time.
BRR is initialized to H'FF upon reset, and in standby, watch, subactive, or subsleep mode.
Table 10.6 shows examples of BRR settings in asynchronous mode. The values shown are for
active (high-speed) mode.
Table 10.6
Bit Rate
(bits/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
308
Bit
Initial value
Read/Write
n
1
0
0
0
0
0
—
—
—
0
—
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode)
N
70
207
103
51
25
12
—
—
—
0
—
BRR7
R/W
2
7
1
Error
(%)
+0.03
+0.16
+0.16
+0.16
+0.16
+0.16
—
—
—
0
—
BRR6
R/W
6
1
n
1
0
0
0
0
0
0
0
0
—
0
BRR5
R/W
2.4576
N
86
255
127
63
31
15
7
3
1
—
0
5
1
Error
(%)
+0.31
0
0
0
0
0
0
0
0
—
0
BRR4
OSC (MHz)
R/W
4
1
n
1
1
0
0
0
0
0
—
—
0
—
BRR3
R/W
3
1
N
141
103
207
103
51
25
12
—
—
1
—
4
Error
(%)
+0.16
+0.16
+0.16
+0.16
+0.16
+0.16
—
—
0
—
+0.03
BRR2
R/W
2
1
n
1
1
0
0
0
0
0
0
—
—
—
BRR1
R/W
1
1
4.194304
N
148
108
217
108
54
26
13
6
—
—
—
BRR0
R/W
Error
(%)
–0.04
+0.21
+0.21
+0.21
–0.70
+1.14
–2.48
–2.48
—
—
—
0
1