HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 132

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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6.6
When an on-board programming mode is selected, on-chip flash memory programming, erasing,
and verifying can be carried out. There are two on-board programming modes—boot mode and
user program mode—set by the mode pin (TEST) and the FV
select the on-board programming modes. For information on turning V
section 6.9, Flash Memory Programming and Erasing Precautions.
Table 6.10 On-Board Programming Mode Selection
Mode Setting
Boot mode
User program mode
Note: * See notes 6 to 8 in section 6.6.1, Notes on Use of Boot Mode, for the timing of 12 V
6.6.1
When boot mode is used, a user program for flash memory programming and erasing must be
prepared beforehand in the host machine (which may be a personal computer). SCI3 is used in
asynchronous mode (see figure 6.8). When the H8/3644F, H8/3643F, or H8/3642AF is set to boot
mode, after reset release a built-in boot program is activated, the low period of the data sent from
the host is first measured, and the bit rate register (BRR) value determined. The chip’s on-chip
serial communication interface (SCI3) can then be used to download the user program from the
host machine. The downloaded user program is written into RAM.
After the program has been stored, execution branches to the start address (H'FBE0) of the on-chip
RAM, the program stored in RAM is executed, and flash memory programming/erasing can be
carried out. Figure 6.10 shows the boot mode execution procedure.
application.
On-Board Programming Modes
Boot Mode
HOST
Figure 6.9 Boot Mode System Configuration
Reception of programming data
FV
12 V*
Transmission of verify data
PP
TEST
12 V*
V
SS
PP
pin. Table 6.10 shows how to
PP
on and off, see note 5 in
RXD
TXD
H8/3643F, or
H8/3642AF
H8/3644F,
Notes
SCI3
123

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