HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 58

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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2.7.2
In the program execution state the CPU executes program instructions in sequence.
There are three modes in this state, two active modes (high speed and medium speed) and one
subactive mode. Operation is synchronized with the system clock in active mode (high speed and
medium speed), and with the subclock in subactive mode. See section 5, Power-Down Modes for
details on these modes.
2.7.3
In the program halt state there are five modes: two sleep modes (high speed and medium speed),
standby mode, watch mode, and subsleep mode. See section 5, Power-Down Modes for details on
these modes.
2.7.4
The exception-handling state is a transient state occurring when exception handling is started by a
reset or interrupt and the CPU changes its normal processing flow. In exception handling caused
by an interrupt, SP (R7) is referenced and the PC and CCR values are saved on the stack.
For details on interrupt handling, see section 3.3, Interrupts.
48
Program halt state
Program Execution State
Program Halt State
Exception-Handling State
Reset
occurs
Reset state
Reset
occurs
SLEEP instruction executed
Figure 2.15 State Transitions
Reset cleared
Reset occurs
Interrupt
source
Exception-handling state
Program execution state
Exception-
handling
request
Exception-
handling
complete

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