HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 127

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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6.5
6.5.1
FLMCR is an 8-bit register used for flash memory operating mode control. Transitions to program
mode, erase mode, program-verify mode, and erase-verify mode are made by setting bits in this
register. FLMCR is initialized to H'00 upon reset, in sleep mode, subsleep mode, watch mode, and
standby mode, and when 12 V is not applied to FV
initializes FLMCR to H'80.
Note: * For information on access to this register, see note 11 in section 6.9, Flash Memory
Bit 7—Programming Power (V
FV
Erasing Precautions.
Bit 7: V
0
1
Bit 3—Erase-Verify Mode (EV)*
Bit 3: EV
0
1
118
Bit
Initial value
Read/Write
PP
pin. For further information, see note 5 in section 6.9, Flash Memory Programming and
Programming and Erasing Precautions.
PP
Flash Memory Register Descriptions
Flash Memory Control Register (FLMCR)
Description
Clearing conditions:
When 12 V is not applied to the FV
Setting conditions:
When 12 V is applied to the FV
Description
Exit from erase-verify mode
Transition to erase-verify mode
V
R
7
0
PP
6
0
PP
): Bit 7 is a status flag that indicates that 12 V is applied to the
1
: Bit 3 selects transition to or exit from erase-verify mode.
5
0
PP
PP
4
0
. When 12 V is applied to FV
pin
PP
pin
R/W*
EV
3
0
R/W*
PV
2
0
R/W*
PP
E
1
0
, a reset
(initial value)
(initial value)
R/W*
P
0
0

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