HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 327

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Figure 10.10 shows an example of a flowchart for initializing SCI3.
1
2
3
4
and when transmitting
(TE = 1), set bit TXD
Clear bits TE and
MPIE as necessary,
RIE, TIE, TEIE, and
Set value in BRR
Set bit TE or RE to
Set data transfer
1 in SCR3, set bits
RE to 0 in SCR3
Has 1-bit period
Set bits CKE1
format in SMR
to 1 in PMR7
and CKE0
elapsed?
Start
End
Yes
Figure 10.10 Example of SCI3 Initialization Flowchart
Wait
No
1.
2.
3.
4. Wait for at least the interval required to
Set clock selection in SCR3. Be sure to
clear the other bits to 0. If clock output
is selected in asynchronous mode, the
clock is output immediately after setting
bits CKE1 and CKE0. If clock output is
selected for reception in synchronous
mode, the clock is output immediately
after bits CKE1, CKE0, and RE are
set to 1.
Set the data transfer format in the serial
mode register (SMR).
Write the value corresponding to the
transfer rate in BRR. This operation is
not necessary when an external clock
is selected.
transmit or receive one bit, then set TE or
RE in the serial control register (SCR3).
Setting RE enables the RxD pin to be used,
and when transmitting, setting bit TXD in
PMR7 enables the TXD output pin to be
used.
Also set the RIE, TIE, TEIE, and MPIE bits
as necessary to enable interrupts. The
initial states are the mark transmit state
and the idle receive state (waiting for a
start bit).
321

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