HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 311

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Bit 6—Receive Data Register Full (RDRF): Bit 6 indicates that received data is stored in RDR.
Bit 6: RDRF
0
1
Note: If an error is detected in the receive data, or if the RE bit in SCR3 has been cleared to 0,
Bit 5—Overrun Error (OER): Bit 5 indicates that an overrun error has occurred during
reception.
Bit 5: OER
0
1
Notes: 1. When bit RE in SCR3 is cleared to 0, bit OER is not affected and retains its previous
RDR and bit RDRF are not affected and retain their previous state.
Note that if data reception is completed while bit RDRF is still set to 1, an overrun error
(OER) will result and the receive data will be lost.
2. RDR retains the receive data it held before the overrun error occurred, and data
state.
received after the error is lost. Reception cannot be continued with bit OER set to 1,
and in synchronous mode, transmission cannot be continued either.
Description
There is no receive data in RDR
Clearing conditions:
There is receive data in RDR
Setting conditions:
When reception ends normally and receive data is transferred from RSR to
RDR
Description
Reception in progress or completed
Clearing conditions:
After reading OER = 1, cleared by writing 0 to OER
An overrun error has occurred during reception
Setting conditions:
When reception is completed with RDRF set to 1
After reading RDRF = 1, cleared by writing 0 to RDRF
When RDR data is read by an instruction
*
1
*
2
(initial value)
(initial value)
305

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