HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 146

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Prewrite Flowchart
(flash memory latches programmed address
(set bit for block to be programmed to 1)
(clear bit for programmed block to 0)
Write H'00 to flash memory
Clear erase block register
Enable watchdog timer
Disable watchdog timer
Set erase block register
Select program mode
Set start address
(P bit = 1 in FLMCR)
(read data H'00?)
Prewrite verify
End of prewrite
Wait (t
Wait (x) s
Last address?
and data)
Clear P bit
OK
Start
n = 1
vs1
Yes
) s
*1
*4
*5
*3
*6
*2
*6
NG
End of programming
No
Figure 6.16 Prewrite Flowchart
Programming error
Notes: 1. Write using a byte transfer instruction.
Yes
n
N?
2. For the timer overflow interval, set the
3. In prewrite-verify mode, P, E, PV, and EV
4. Programming time x is successively
5. t
6. The start address and last address are the
*5
timer counter value (TCW) to H'FE.
are all cleared to 0, and 12 V is applied to
the V
incremented to initial set value
(n = 1 to 6). The initial value should
therefore be set to 15.8 s or less to make
the total programming time 1 ms or less.
N:
start address and last address of the block
to be erased.
vs1
: 4 s or more
6 (set N so that the total programming
time does not exceed 1 ms)
PP
pin. Read using a byte transfer
No
Double the programming time
(x
n + 1
Address + 1
2
2
n–1
x)
n
address
137

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