HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 63

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Example 2: BSET instruction executed designating port 3
P3
signal at P3
example, the BSET instruction is used to change pin P3
[A: Prior to executing BSET]
Input/output
Pin state
PCR3
PDR3
[B: BSET instruction executed]
[C: After executing BSET]
Input/output
Pin state
PCR3
PDR3
[D: Explanation of how BSET operates]
When the BSET instruction is executed, first the CPU reads port 3.
Since P3
P3
of H'80, but the value read by the CPU is H'40.
Next, the CPU sets bit 0 of the read data to 1, changing the PDR3 data to H'41. Finally, the CPU
writes this value (H'41) to PDR3, completing execution of BSET.
As a result of this operation, bit 0 in PDR3 becomes 1, and P3
However, bits 7 and 6 of PDR3 end up with different values.
BSET
7
5
and P3
to P3
7
0
and P3
are output pins, so the CPU reads the value in PDR3. In this example PDR3 has a value
6
6
are designated as input pins, with a low-level signal input at P3
. The remaining pins, P3
#0
6
P3
Input
Low
level
0
1
P3
Input
Low
level
0
0
are input pins, the CPU reads the pin states (low-level and high-level input).
,
7
7
@PDR3
P3
Input
High
level
0
0
P3
Input
High
level
0
1
6
6
5
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
to P3
The BSET instruction is executed designating port 3.
5
5
0
, are output pins and output low-level signals. In this
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
4
4
0
to high-level output.
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
3
3
0
outputs a high-level signal.
P3
P3
0
Output
Low
level
1
0
Output
Low
level
1
2
2
7
and a high-level
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
1
1
P3
Output
Low
level
1
0
P3
Output
High
level
1
1
0
0
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