HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 270

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Input Capture Timing
262
ø
Input capture
pin
Input capture
signal
ø
Input capture
pin
Input capture
signal
Input capture timing
The rising or falling edge is selected for input capture by bits IEDGA to IEDGD in TCRX.
Figure 9.24 shows the timing when the rising edge is selected (IEDGA/B/C/D = 1).
If the input at the input capture pin occurs while the upper byte of the corresponding input
capture register (ICRA to ICRD) is being read, the internal input capture signal is delayed by
one system clock (ø). Figure 9.25 shows the timing.
Figure 9.25 Input Capture Signal Timing (during ICRA to ICRD Read)
Figure 9.24 Input Capture Signal Timing (Normal Case)
ICRA to ICRD upper byte read cycle
T
1
T
2
T
3