HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 303

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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RSR is a register used to receive serial data. Serial data input to RSR from the RXD pin is set in
the order in which it is received, starting from the LSB (bit 0), and converted to parallel data.
When one byte of data is received, it is transferred to RDR automatically.
RSR cannot be read or written directly by the CPU.
Receive Data Register (RDR)
RDR is an 8-bit register that stores received serial data.
When reception of one byte of data is finished, the received data is transferred from RSR to RDR,
and the receive operation is completed. RSR is then enabled for reception. RSR and RDR are
double-buffered, allowing consecutive receive operations.
RDR is a read-only register, and cannot be written by the CPU.
RDR is initialized to H'00 upon reset, and in standby, watch, subactive, or subsleep mode.
Transmit Shift Register (TSR)
TSR is a register used to transmit serial data. Transmit data is first transferred from TDR to TSR,
and serial data transmission is carried out by sending the data to the TXD pin in order, starting
from the LSB (bit 0). When one byte of data is transmitted, the next byte of transmit data is
transferred from TDR to TSR, and transmission started, automatically. Data transfer from TDR to
TSR is not performed if no data has been written to TDR (if bit TDRE is set to 1 in the serial
status register (SSR)).
TSR cannot be read or written directly by the CPU.
Bit
Initial value
Read/Write
Bit
Read/Write
RDR7
R
7
0
7
RDR6
R
6
0
6
RDR5
R
5
0
5
RDR4
R
4
0
4
RDR3
R
3
0
3
RDR2
R
2
0
2
RDR1
R
1
0
1
RDR0
R
0
0
0
297

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