HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 297

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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10.2.4
SSB communication uses two lines, SCL (Serial Clock) and SDA (Serial Data), and enables
multiple ICs to be connected as shown in figure 10.3.
In SSB mode, TAIL MARK is sent after an 8- or 16-bit data transfer. HOLD TAIL or LATCH
TAIL can be selected as TAIL MARK.
Clock: The transfer clock can be selected from eight internal clocks or an external clock, but since
the H8/3644 Series uses clock output, an external clock should not be selected. The transfer rate
can be selected by bits CKS2 to CKS0 in SCR1. Since this is also the TAIL MARK transfer rate,
the setting should be made to give a transfer clock cycle of at least 2 s.
Data Transfer Format: Figure 10.4 shows the SCI1 transfer format. Data is sent starting from the
least significant bit, in LSB-first format. TAIL MARK is sent after an 8- or 16-bit data transfer.
SCK
SO
Series LSI
1
H8/3644
1
Operation in SSB Mode
Figure 10.4 Transfer Format (When SNC1 = 0, SNC0 = 1, MRKON = 1)
SCK
SO
Bit 0
1
1
Bit 1
Bit 2
Figure 10.3 Example of SSB Connection
Bit 3
IC-A
Bit 4
1 frame
Bit 5
Bit 14
Bit 15
IC-B
TAIL MARK
IC-C
SCL
SDA
291

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