HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 150

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Flowchart for Erasing Multiple Blocks
Erase-verify
next block
Address + 1
address
No
No
(set bit for block to be erased to 1)
Write 0 data in all addresses to be
Dummy write to verify address
Enable watchdog timer
Set block start address as
Select erase-verify mode
Disable watchdog timer
Figure 6.17 Multiple-Block Erase Flowchart
Clear EBR bit for erase
completed for all erase
Set erase block register
(EV bit = 1 in FLMCR)
(flash memory latches
(EBR1 = EBR2 = 0?)
(E bit = 1 in FLMCR)
(read data H'FF?)
erased (prewrite)
Select erase mode
Wait (t
Wait (t
blocks erased?
Wait (x) ms
End of erase
verify address
Last address
Erase-verify
Clear EV bit
Clear E bit
OK
Yes
Yes
Yes
Verify
All erase
of block?
address)
blocks?
Start
block
n = 1
vs2
vs1
) s
) s
*4
*5
*6
*6
*1
*2
*3
NG
Erasing halts
No
completed for all erase
Erase-verify
blocks?
Notes: 1. Program all addresses to be erased by
Yes
2. Set the timer overflow interval to the initial
3. For the erase-verify dummy write, write
4. For the erase-verify operation, read the
5. Erase time x is successively incremented
6. t
following the prewrite flowchart.
value shown in table 6.13.
H'FF using a byte transfer instruction.
data using a byte transfer instruction.
When erasing multiple blocks, clear the
erase block register bits for erased blocks
and perform additional erasing only for
unerased blocks.
to initial set value
fixed from the 4th time onward. An initial
value of 6.25 ms or less should be set, and
the time for one erasure should be 50 ms
or less.
t
N:
vs1
vs2
: 4 s or more
: 2 s or more
Double the erase time
602 (set N so that the total erase
time does not exceed 30 s)
No
(x
Yes
Erase error
Erase-verify next block
n
n
2
N?
4?
No
*6
x)
2
n–1
(n = 1 to 4), and is
Yes
No
n + 1
n
141

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