HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 362

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

12.3
12.3.1
The A/D converter operates by successive approximations, and yields its conversion result as 8-bit
data.
A/D conversion begins when software sets the A/D start flag (bit ADSF) to 1. Bit ADSF keeps a
value of 1 during A/D conversion, and is cleared to 0 automatically when conversion is complete.
The completion of conversion also sets bit IRRAD in interrupt request register 2 (IRR2) to 1. An
A/D conversion end interrupt is requested if bit IENAD in interrupt enable register 2 (IENR2) is
set to 1.
If the conversion time or input channel needs to be changed in the A/D mode register (AMR)
during A/D conversion, bit ADSF should first be cleared to 0, stopping the conversion operation,
in order to avoid malfunction.
12.3.2
The A/D converter can be made to start A/D conversion by input of an external trigger signal.
External trigger input is enabled at pin ADTRG when bit TRGE in AMR is set to 1. Then when
the input signal edge designated in bit INTEG5 of interrupt edge select register 2 (IEGR2) is
detected at pin ADTRG, bit ADSF in ADSR will be set to 1, starting A/D conversion.
Figure 12.2 shows the timing.
ø
Pin ADTRG
(when bit
INTEG5 = 0)
ADSF
Operation
A/D Conversion Operation
Start of A/D Conversion by External Trigger Input
Figure 12.2 External Trigger Input Timing
A/D conversion
357