HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 354

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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Bit 0—Clock Select 0 (PWCR0): Bit 0 selects the clock supplied to the 14-bit PWM. This bit is a
write-only bit; it is always read as 1.
Bit 0: PWCR0
0
1
Note: * t
11.2.2
PWDRU
PWDRL
PWDRU and PWDRL form a 14-bit write-only register, with the upper 6 bits assigned to PWDRU
and the lower 8 bits to PWDRL. The value written to PWDRU and PWDRL gives the total high-
level width of one PWM waveform cycle.
When 14-bit data is written to PWDRU and PWDRL, the register contents are latched in the PWM
waveform generator, updating the PWM waveform generation data. The 14-bit data should always
be written in the following sequence:
1. Write the lower 8 bits to PWDRL.
2. Write the upper 6 bits to PWDRU.
PWDRU and PWDRL are write-only registers. If they are read, all bits are read as 1.
Upon reset, PWDRU and PWDRL are initialized to H'C000.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
ø
: Period of PWM input clock
PWM Data Registers U and L (PWDRU, PWDRL)
PWDRL7 PWDRL6 PWDRL5 PWDRL4 PWDRL3 PWDRL2 PWDRL1 PWDRL0
Description
The input clock is ø/2 (t
a minimum modulation width of 1/ø
The input clock is ø/4 (t
a minimum modulation width of 2/ø.
W
7
1
7
0
W
6
1
6
0
PWDRU5 PWDRU4 PWDRU3 PWDRU2 PWDRU1 PWDRU0
W
W
5
0
5
0
ø
ø
* = 2/ø). The conversion period is 16,384/ø, with
* = 4/ø). The conversion period is 32,768/ø, with
W
W
4
0
4
0
W
W
3
0
3
0
W
W
2
0
2
0
W
W
1
0
1
0
(initial value)
W
W
0
0
0
0
349

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