HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 123

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

floating gate to tunnel out. After erasure, the threshold voltage drops. A memory cell is read like
an EPROM cell, by driving the gate to a high level and detecting the drain current, which depends
on the threshold voltage. Erasing must be done carefully, because if a memory cell is overerased,
its threshold voltage may become negative, causing the cell to operate incorrectly.
Section 6.7.6, Erase Flowcharts and Sample Programs, shows optimal erase control flowcharts and
sample programs.
Table 6.6
Memory
cell
Memory
array
6.4.2
The H8/3644F has 32 kbytes of on-chip flash memory, the H8/3643F has 24 kbytes, and the
H8/3642AF has 16 kbytes. The ROM is connected to the CPU by a 16-bit data bus. The CPU
accesses flash memory in two states for both byte-size and word-size instructions.
The flash memory is allocated to addresses H'0000 to H'7FFF in the H8/3644F, to addresses
H'0000 to H'5FFF in the H8/3643F, and to addresses H'0000 to H'3FFF in the H8/3642AF.
114
Mode Pin Settings and ROM Space
Program
Principle of Memory Cell Operation
Vd
Vg = V
PP
0 V
Vd
V
0 V
0 V
PP
Erase
Vs = V
PP
Open
Open
Open
0 V
V
0 V
PP
Read
Vd
Vg = V
CC
0 V
Vd
V
0 V
0 V
CC