HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 355

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

11.3
When using the 14-bit PWM, set the registers in the following sequence.
1. Set bit PWM in port mode register 1 (PMR1) to 1 so that pin P1
2. Set bit PWCR0 in the PWM control register (PWCR) to select a conversion period of either
3. Set the output waveform data in PWM data registers U and L (PWDRU/L). Be sure to write in
350
output.
32,768/ø (PWCR0 = 1) or 16,384/ø (PWCR0 = 0).
the correct sequence, first PWDRL then PWDRU. When data is written to PWDRU, the data
in these registers will be latched in the PWM waveform generator, updating the PWM
waveform generation in synchronization with internal signals.
One conversion period consists of 64 pulses, as shown in figure 11.2. The total of the high-
level pulse widths during this period (T
This relation can be represented as follows.
where t
Example: Settings in order to obtain a conversion period of 8,192 s:
T = t
t
f1
H
T
Operation
H
= t
ø
= (data value in PWDRU and PWDRL + 64)
is the PWM input clock period, either 2/ø (bit PWCR0 = 0) or 4/ø (bit PWCR0 = 1).
t
H1
f2
H1
When bit PWCR0 = 0, the conversion period is 16,384/ø, so ø must be 2 MHz. In
this case t
When bit PWCR0 = 1, the conversion period is 32,768/ø, so ø must be 4 MHz. In
this case t
Accordingly, for a conversion period of 8,192 s, the system clock frequency (ø)
must be 2 MHz or 4 MHz.
= t
t
+ t
f1
f3
H2
..... = t
+ t
fn
fn
H3
= 128 s, with 1/ø (resolution) = 0.5 s.
= 128 s, with 2/ø (resolution) = 0.5 s.
t
+
H2
Figure 11.2 PWM Output Waveform
f64
..... t
t
f2
H64
1 conversion period
t
H
H3
) corresponds to the data in PWDRU and PWDRL.
t
ø
/2
t
H63
t
f63
4
/PWM is designated for PWM
t
H64
t
f64