s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 89
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s5u1c33000c
Manufacturer Part Number
s5u1c33000c
Description
Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S5U1C33000C.pdf
(548 pages)
- Current page: 89 of 548
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S5U1C33000C MANUAL
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
Note: This configuration synchronizes the text box (Start Address) and radio button (Memory type)
Configuration for S5U1C33001M1
The following parameters can be selected/entered only when "ICD+MEM33" is selected for the debugger
mode.
CEFUNC value:
MEM33 address:
MEM33 delay:
Area10 external memory start address:
P30 is CE:
P34 is CE:
Area7 (13) is DRAM:
Area8 (14) is DRAM:
WRH Mask:
Map break disable:
CE break disable:
No CE break disable:
Setting SIM DLL mode
The [DLL file name] and [DLL option] parameters can be entered only in the simulator mode.
It is not necessary to enter or change these parameters when using the debugger in the normal simulator
mode.
Refer to the "S5U1C330C2S Manual" for details of the SIM DLL mode.
Choose a value so that DRAM timing can be set in the D9 bit and DA bit in the setting register (in
S1C33208, 0x48130).
which configure the external memory area. Therefore, perform this configuration first.
Configure in the area where S5U1C33001M1 is mapped (selection signal where you choose
S5U1C33001M1 DSW6).
Use 8ns, usually.
Write start address of external area 10.
Select this if you use P30 as the CE signal.
Select this if you use P34 as the CE signal.
Select this if you set DRAM in area 7 (13).
Select this if you set DRAM in area 8 (14).
Select this if you do not use the WRH signal (if you use 16 SRAM in BSL/BSH method).
Select this if you only disable map break.
Select this if you only disable CE break.
Select this if you only disable No CE break.
EPSON
CHAPTER 5: WORK BENCH
73
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