s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 474

• Manufacturer Part Number: s5u1c33000c
• Description: Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
• Manufacturer: Epson Electronics America, Inc.

CHAPTER 16: DEBUGGER
(11) Debug operations using the S5U1C33001M1
(12) End mark
458
When using the S5U1C33001M1 for debugging, the following information needs to be set. The
S5U1C33001M1 must be used in combination with the S5U1C33000H.
1) Setting the S5U1C33xxxM board address
2) Setting CEFUNC
3) Setting area 10
4) Setting DRAM area
5) Settings when using P30 or P34 as CE
6) Setting a memory access delay
7) Setting the WRH signal
8) Disabling map break
9) Disabling CE break
10) Disabling NO CE break
Always be sure to write END at the end of a parameter file.
Example) ;!MEM33_CE 4
Always be sure to set this information. Specify MEM33_CE in the range 4 to 10.
(Inside the debugger, S5U1C33xxxM is set assuming CEFUNC = 00.)
Example) ;!MEM33_CEFUNC 00
Always be sure to set this information. Specify MEM33_MAP_CEFUNC using binary values 00, 01,
10, or 11. If any area that cannot be accessed with the specified value of CEFUNC is mapped, a
warning is displayed.
Example) ;!MEM33_CE10EX c08000
10.
If not specified, the address by default is set to 0xc00000.
In the example here, addresses 0xc00000 to 0xc07fff comprise the internal ROM.
Example 1) ;!MEM33_CE7_DRAM
Example 2) ;!MEM33_CE8_DRAM
If not specified, the area by default is set to SRAM.
Example 1) ;!MEM33_P30
Example 2) ;!MEM33_P34
If not specified, CE by default is unused.
Example) ;!MEM33_DELAY 0
Specify the delay in the range 0 to 3.
If not specified, the delay is set to 2 by default. Normally do not specify other than 2.
Example) ;!MEM33_WRH_MASK
If not specified, break by WRH is enabled by default. This signal must be enabled when using the
BSH or BSL method for x16 SRAM.
Example) ;!MEM33_MAP_DISABLE
If not specified, map break by default is enabled.
Example) ;!MEM33_CE_DISABLE
If not specified, CE break by default is enabled.
Example) ;!MEM33_NOCE_DISABLE ; Disable NO CE break
This specification disables NO CE break, which is provided as part of the CE break and map break
functions.
If not specified, NO CE break by default is enabled.
A NO CE break occurs when RD or WR access is attempted while CE is inactive.
EPSON
; Set the S5U1C33xxxM board to CE4
; In user applications, CEFUNC is fixed to 00.
; Specify the start address of external access area in area
; This description applies when area 7 or 13 is DRAM.
; This description applies when area 8 or 14 is DRAM.
; Use P30 as CE
; Use P34 as CE
; Set delay to 0
; Ignore the WRH signal
; Disable map break
; Disable CE break
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
S5U1C33000C MANUAL