s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 473

• Manufacturer Part Number: s5u1c33000c
• Description: Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
• Manufacturer: Epson Electronics America, Inc.

(10) Setting stack area
S5U1C33000C MANUAL
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
If the addresses set here overlap the areas used in emulation memory specified by EMRAM and/or
EMROM, the RAM, ROM, or IO settings made here have priority. Namely, if an access to the overlapping
area is made, it is the target board that is accessed and the emulation memory is not used. Thus the 1M-byte
emulation memory can be further divided into areas that use the emulation memory and other areas that do
not use the emulation memory.
Up to 31 maps can be set, for all RAM, ROM, IO, ERAM, EROM, and EIO included.
Specifying the number of wait cycles
When using the db33 in simulator mode, the number of access wait cycles needs to be written in the
parameter file.
Since the CPU clock cycles are calculated under conditions specified here, the number of clock cycles
displayed by the execution counter and in the trace information of the debugger may not be correct if
settings in the parameter file are incorrect.
The number of wait cycles is written in the form like "77H", where the first 7 indicates the number of wait
cycles for read, the next 7 indicates the number of wait cycles for write, and the last H indicates the device
size.
The number of wait cycles can be specified in the range of 0 to f (15).
Wait cycles for write may be omitted, which means that default number of wait cycles "number of wait
cycles for read + 1" is used.
The device size is indicated by "B", "H", or "W", each representing 8 bits, 16 bits, and 32 bits, respectively.
The device size must be input in uppercase letters.
In the area specified for IROM, calculations are made based on 77H. If not specified, the default value is
77H. In old debugger versions, the presence of these specifications results in an error.
Specification of big-endian areas
By default, the mapped areas are set as little-endian areas. To change the area format to big-endian,
describe letter "B" after the <end address> (select [Big] when creating in the wb33). However, the S1C33
chip to be developed must be a model that supports big-endian format. Furthermore, the internal memory
(ROM, RAM and I/O) cannot be set to big-endian.
In addition to specify this parameter file at invocation of the db33, the endian control register in the S1C33
chip must be set correctly (refer to the "Technical Manual").
In simulator mode, the endian format is determined by the parameter file only.
This setting affects memory operation and file loading in half word or word units.
Specify an area you want to be used as the stack.
STACK <start address> <end address>
Up to 8 stack areas can be set.
Specify a start address that resides on a 256-byte boundary. Specify an end address so that the area size is
an integer multiple of 256 bytes.
This setting is valid in ICE mode, so that when a stack operation is performed on a non-specified area, a
break occurs. However, a stack operation performed on the internal RAM that starts from address 0 is
excluded from break generation and, hence, does not cause a break. Therefore, STACK settings for areas in
the internal RAM can be omitted.
This setting does not affect the SP operation by a program.
EPSON
(Multiple entries accepted; or can be omitted)
CHAPTER 16: DEBUGGER
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