s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 339
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s5u1c33000c
Manufacturer Part Number
s5u1c33000c
Description
Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S5U1C33000C.pdf
(548 pages)
- Current page: 339 of 548
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S5U1C33000C MANUAL
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
The following shows restrictions common to all modes:
(4) Restriction on absolute branch
(5) Restriction on the execution program
(6) Simulated I/O
The following shows the precautions regarding to S5U1C33000H hardware:
(7) Setting the S5U1C33000H
(8) Upper limit clock frequency for ICD trace function
If two or more absolute branches occur within a 27-clock period, the complete PC values cannot be
determined. Although the db33 tries a recovery process using the map information and the call–ret
nesting information, the PC values may not be analyzed.
When a program is loaded by the lf or lh command, the db33 keeps the program information and uses
the disassemble information for the PC value analysis. Therefore, there may be differences between the
internal analysis information and the target program in the following cases:
• when the program to be executed has been stored in a ROM
• when the target program copies/moves the execution routine dynamically
• when the program area is modified using a db33 command
In those cases, load the necessary part of the program from the target to the db33 using the rm
command.
The simulated I/O function uses the software PC break, step execution and source step execution
functions, so do not use it with the trace function simultaneously.
To use the trace function in ICD mode, the DIP switch SW4 on the S5U1C33000H must be set to
OPEN (upper position). Furthermore, the debugging signals required for tracing (DST0, DST1, DST2,
DPCO) must be connected between the target board and the S5U1C33000H using the 10-pin interface
cable.
The operating clock frequency is limited to 50 MHz when the S5U1C33000H trace function is used. A
higher frequency causes data error.
When using a 50 MHz or higher CPU operating clock, disable the ICD trace function using the DIP
switch (SW4) in the S5U1C33000H. Furthermore, the speed of the S1C33 BCU (bus) should be set to
1/2 or less of the CPU core operating speed (using the #X2SPD pin).
The ICD functions other than the trace function operate at the same speed as the bus and the maximum
frequency is 40 MHz.
EPSON
CHAPTER 16: DEBUGGER
323
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