s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 438

• Manufacturer Part Number: s5u1c33000c
• Description: Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
• Manufacturer: Epson Electronics America, Inc.

CHAPTER 16: DEBUGGER
16.10.12 Trace Commands
tm (trace mode)
422
(1) ICE mode
(2) ICD mode
Function
In ICE mode, this command displays and sets a trace mode and trace trigger conditions.
Trace mode
The following two trace modes can be set:
1) Normal trace mode
2) Single-delay trigger trace mode
Trace trigger conditions
The following three types of trace trigger conditions can be set:
1) Address
2) Data pattern and mask
3) Bus operation type
When one of these conditions is satisfied, a point in time (trace trigger point) at which single-delay trigger
trace or pulse output from the S5U1C33104H's TRGOUT pin is controlled.
In ICD mode, this command displays and sets a trace mode and trace trigger addresses.
Trace mode
The following two trace modes can be set:
1) All trace mode
2) Area trace mode
The data written to the trace memory is always the latest trace information.
The following three types of trace sampling areas can be specified with respect to the trace trigger point
(establishment of trace trigger condition):
1. start
2. middle
3. end
One memory address can be specified. The trace trigger is generated on condition that the CPU accesses
this address.
Specify the data pattern that the CPU reads or writes to the above address. You can specify a 16-bit
pattern, setting each bit as desired. Selected bits or all bits can be masked out for exclusion from trace
trigger conditions.
Specify a bus operation type in which operation the CPU accesses the above address. One of the
following bus operation types can be selected:
Trace is initiated by a start of program execution. The trace information is written to the trace memory
regardless of the address executed.
Trace information is taken into the trace memory only when the program within the range from trigger
address 1 to trigger address 2 is executed.
0. All
1. Inst
2. VecR
3. DatR
4. DatW
5. StkR
6. StkW
7. DmaR
8. DmaW ...Write by DMA
...All bus operations
...Instruction fetch
...Vector fetch
...Data read
...Data write
...Read from stack
...Write to stack
...Read by DMA
...Trace information is collected beginning with the trace trigger point.
...Trace information before and after the trace trigger point is collected.
...Trace information is collected until the trace trigger point is reached.
EPSON
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
S5U1C33000C MANUAL
[ICD / ICE / SIM]