s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 311
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s5u1c33000c
Manufacturer Part Number
s5u1c33000c
Description
Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S5U1C33000C.pdf
(548 pages)
- Current page: 311 of 548
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Simulator mode
Simulator DLL mode
Precaution for ICE, ICD and debug monitor mode
S5U1C33000C MANUAL
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
Specification at startup
Startup option:
Specification on wb33: Select [SIM]
When the debugger starts up in simulator mode, "SIM" is displayed on the tool bar.
The simulator mode is used to simulate target program execution in the internal memory of a personal
computer; therefore, other debugging tools are not required. In this mode, however, you cannot evaluate the
S5U1C33104H dependent functions and the I/O functions of the target system. What is possible in this
mode is simulation of the core CPU, memory model, and interrupt.
The sequential break and some other functions available in ICE mode are not supported in simulator mode.
The trace method in simulator mode differs from other modes. See the description of each command for
details.
Each area in simulator mode is initialized as follows:
RAM: 0xaa
ROM: 0xff
I/O:
Specification at startup
Startup option:
Specification on wb33: Select [SIMDLL]
When the debugger starts up in simulator DLL mode, "SIMDLL" is displayed on the tool bar.
Refer to the "S5U1C330C2S Manual" for details on simulator DLL mode.
When the program execution is suspended, the S5U1C33104H and S5U1C33000H switch the CPU
operating clock to the high-speed (OSC3) clock and halt all the peripheral functions except for the DRAM
refresh operation. In the Debug Monitor, the same status occurs instantaneously when a break occurs or
program execution starts, however it returns to the previous status immediately.
Therefore, the system that does not use an OSC3 clock cannot be debugged.
When the OSC3 oscillation circuit is stopped and the system is operating with the low-speed clock (OSC1,
32 kHz), the OSC3 oscillation circuit will start oscillating immediately after a break occurs. However, an
erroneous operation may result since the oscillation is unstable. Do not suspend the program execution
while the OSC3 oscillation is stopped, even in SLEEP status.
0x00
Specify -sim
Specify -simdll
EPSON
CHAPTER 16: DEBUGGER
295
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