s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 406

• Manufacturer Part Number: s5u1c33000c
• Description: Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
• Manufacturer: Epson Electronics America, Inc.

CHAPTER 16: DEBUGGER
390
(3) Clearing bus break conditions
Notes
The bb command can only be used in ICD+MEM33 mode.
The extended break available with the S5U1C33001M1 is generated using the S5U1C33000H’s external
break, so that the target does not stop immediately after a break occurs.
The address users set (the one after being masked) must be within the range accessible by the CEFUNC that is
specified in the parameter file. Otherwise, an error is assumed.
If the specifications in the parameter file and the BCU setting are inconsistent, the break will be incorrect.
Note that BCU defaults to its initial setting after a cold reset.
Take care that the S5U1C33001M1 addresses and the target’s memory and I/O addresses do not conflict.
Specifying an internal memory area results in an error.
When using sequential mode while the 32-bit bus is selected, at least one memory access is required between
32-bit accesses. For successive accesses, the second 32 bits compared for break condition will not match.
The following shows the contents of parameters to set.
The items listed below must be set individually for each condition number.
After displaying the current settings, input a command as shown below:
Bus break will be cleared.
A break occurs when the break conditions are met as many times as set by this counter. If you specify 0,
Select the width of the data bus. For the 16-bit bus, six break conditions can be set; for the 32-bit bus,
three break conditions can be set.
Select break mode. For OR mode, a break occurs when any one of the break conditions set is met. For
sequential mode, a break occurs when the break conditions are met sequentially from the smallest to
the last number, but no breaks occur when the break conditions are met in reverse order or only one
condition is met.
a break occurs when the break conditions are met once. If you specify 1, a break occurs when the break
conditions are met twice. In sequential mode, only the access when the last break condition is met is
counted.
Enter the desired number of bus break conditions.
Enter an address in hexadecimal format.
Enter an address mask in hexadecimal format. Set the bits that you want to mask to 0 (exclude from
condition comparison).
The CE signal can be masked by selecting "1. yes".
Enter data in hexadecimal format.
Enter data mask in hexadecimal format. Set the bits that you want to mask to 0 (exclude from condition
comparison).
Select a bus operation from "read", "write", or "read/write".
(current settings)
Error: Invalid address or invalid CEFUNC of parameter file.
Error: MEM33 is not supported at area0, area1 and area2 (0-0x7FFFF).
...Choose "2. clear".
EPSON
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
S5U1C33000C MANUAL