s5u1c33000c Epson Electronics America, Inc., s5u1c33000c Datasheet - Page 335

• Manufacturer Part Number: s5u1c33000c
• Description: Cmos 32-bit Single Chip Microcomputer S5u1c33000c Manual
• Manufacturer: Epson Electronics America, Inc.

Precautions on trace in ICE mode
S5U1C33000C MANUAL
(C COMPILER PACKAGE FOR S1C33 FAMILY) (Ver. 4)
(1) After a single-step execution or a break occurs, information of the pre-fetched instructions that have not
(2) When the program starts a successive execution from an address set as a software PC break point, the
(3) For source-level step execution, the S5U1C33104H repeats single-stepping internally. Therefore, a lot of
(4) Because of the reason stated above, the execution time measured by the execution counter increases by the
(5) Trace data for read/write of the internal RAM cannot be referred since the bus access is undetectable.
(6) During data transfer by the high-speed DMA, data cannot be traced properly.
been executed are displayed. When the target program execution is suspended by a software PC break, the
fetch cycle information of the brk instruction that was inserted for the software PC break is also displayed.
(See example below.)
S5U1C33104H executes single-stepping before starting the successive execution. Therefore, redundant
trace information pre-fetched by the single-stepping may be displayed. (See example below.)
pre-fetch information of all the steps will be displayed.
number of pre-fetch cycles.
Example of pre-fetch data display during step execution
Sample execution program (software PC breaks are set at the addresses with "!")
... Successive execution from 0x80004
... Broken at 0x8000c
... Displays trace data
EPSON
CHAPTER 16: DEBUGGER
... Pre-fetch cycles
... by single-stepping (2)
... Executed
... Pre-fetch cycle (1)
... Pre-fetch cycle (1)
... Software break inst. (1)
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