peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 92

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

4.7.2
The multiframe structure shown in Table 4-9 is enabled by setting TFMR.FM for the
transmitter and RFMR.FM for the receiver.
Multiframe
Frame alignment: refer to
Multiframe alignment: bit 1 of frames 1, 3, 5, 7, 9, 11 with the pattern ‘001011’
CRC bits
CRC block size : 2048 bit (length of a submultiframe)
CRC procedure: CRC-4, according to ITU-T G.704, G.706
Table 4-9
Multiframe
E
S
C
A
Data Sheet
a
1
Spare bits for international use. E bits are replaced by XSP.XS13 and XSP.XS15 or automatic
transmission for submultiframe error indication.
Spare bits for national use. S
HDLC-signaling in bits S
Cyclic redundancy check bits.
Remote alarm indication. Automatic transmission of the A-bit is selectable.
… C
4
CRC-4 Multiframe
Multiframe
CRC-4 Multiframe Structure
: 2 submultiframes = 2
: bit 1 of frames 0, 2, 4, 6, 8, 10, 12, 14
Sub-
II
I
a4
Chapter 4.7.1
- S
Number
Frame
a8
a
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
-bit access via registers RSAW1-3 and XSAW1-3 is provided.
is selectable.
C
C
C
C
C
C
C
C
E
E
1
0
0
1
0
1
1
1
2
3
4
1
2
3
4
8 frames
Doubleframe Format
92
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bits 1 to 8 of the Frame
A
A
A
A
A
A
A
A
3
0
0
0
0
0
0
0
0
S
S
S
S
S
S
S
S
4
1
1
1
1
1
1
1
1
a4
a4
a4
a4
a4
a4
a4
a4
Functional Description
S
S
S
S
S
S
S
S
5
1
1
1
1
1
1
1
1
a5
a5
a5
a5
a5
a5
a5
a5
S
S
S
S
S
S
S
S
6
0
0
0
0
0
0
0
0
a61
a62
a63
a64
a61
a62
a63
a64
PEB 3456 E
S
S
S
S
S
S
S
S
7
1
1
1
1
1
1
1
1
a7
a7
a7
a7
a7
a7
a7
a7
05.2001
S
S
S
S
S
S
S
S
8
1
1
1
1
1
1
1
1
a8
a8
a8
a8
a8
a8
a8
a8