peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 362

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

RAL1
XCRC
CRCDIS
RON
HLDC
Data Sheet
Receive Address Low Byte 1 Valid
This bit enables byte RAL.RAL1 for address comparison.
0
1
Transfer CRC to RFIFO
This bit defines, that CRC of incoming data packets shall be transferred
to the receive FIFO or not.
0
1
CRC Check Disable
This bit enables or disables the CRC check of incoming data packets.
0
1
Receiver On/Off
This bit switches the receiver of the facility data link channel to
operational (on) or inoperational state (off).
0
1
HDLC Mode
This bit identifies the protocol mode of the facility data link receiver.
0
1
Disable
Enable
No transfer of CRC to RFIFO.
Transfer of CRC to RFIFO.
Enable CRC check.
Disable CRC check.
Switch receiver off.
Switch receiver on.
Set protocol mode to transparent.
Set protocol mode to HDLC.
362
Register Description
PEB 3456 E
05.2001