peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 73

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

PEB 3456 E
Functional Description
The total size of the internal receive buffer is 12 kByte. If all the 256 channels are active,
the average burst threshold should be programmed with 8 DWORDs, so that 4 DWORDs
are available on the average to compensate for PCI latency and avoid data loss.
However if less than 256 channels are active or if only 64 KBit/s channels are used, the
burst threshold may be programmed to a higher value. In other words, the sum of all
channel thresholds shall not exceed the maximum receive buffer locations.
In order to prevent an overload condition from one particular channel (e.g. receiving only
small or invalid frames), the receive buffer provides the capability to delete frames which
are smaller or equal than a programmable threshold. All frames that have been dropped
will be counted and an interrupt vector will be generated as soon as a programmable
threshold has been reached. The actual value of the counter can be read in the small
frame dropped counter register.
Data Sheet
73
05.2001