peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 355

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

PDEN/AUX
LLBDD
LLBAD
PRBS
Data Sheet
T1
Pulse Density Code Violation Detected
This bit is set, when the pulse density of the received data stream is
below the requirement defined by ANSI T1.403.
E1
Auxiliary Pattern Detected
This bit is set, when the pattern ’...010101...’ has been detected
concurrent with loss of frame.
Line Loop-Back Deactuation Signal Detected
This bit is set, when line loopback deactuate signal is detected and then
received over a period of more than 33,16ms with a bit error rate less
than 1/100. The bit remains set as long as the bit error rate does not
exceed 1/100.
If framing is aligned, the first bit position of any frame is not taken into
account for the error rate calculation. If frame alignment state is not
synchronized, all received data bits are searched for the LLBD pattern.
Line Loop-Back Actuation Signal Detected
This bit is set to one in case the LLB actuate signal is detected and then
received over a period of more than 33,16ms with a bit error rate less
than 1/100. The bit remains set as long as the bit error rate does not
exceed 1/100.
If framing is aligned, the first bit position of any frame is not taken into
account for the error rate calculation. If frame alignment state is not
synchronized, all receive data bits are searched for the LLBA pattern.
PRBS status
This bit is set, when the PRBS receiver is in the synchronous state. It is
set high if the synchronous state is reached even in the presence of a
BER 1/10. A data stream containing all zeros with / without framing bits
is also a valid pseudo-random bit sequence.
355
Register Description
PEB 3456 E
05.2001