peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 184

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

STAT/CMD
Status/Command Register
Access
Address
Reset Value
DPE
SSE
RMA
Data Sheet
DPE SSE RMA RTA
31
15
0
30
0
29
0
: read/write
: 04
: 02A00000
Detected Parity Error
This bit will be asserted whenever the TE3-CHATT detects a parity error.
0
1
Signaled System Error
This bit will be asserted whenever the TE3-CHATT asserted SERR. For
system error conditions see bit SE.
0
1
Received Master Abort
This bit will set whenever a transaction in which the TE3-CHATT acted
as bus master was terminated with master abort.
0
1
28
0
H
No parity error detected.
Parity error detected. This bit will be cleared by writing a ‘1’ to this
bit position.
No system error signaled.
System error has been signaled. This bit will be cleared by writing
a ‘1’ to this bit position.
No master abort detected.
Transaction terminated with master abort. This bit will be cleared
by writing a ‘1’ to this bit.
27
0
0
H
26
0
01
B
25
0
DPED
SE
24
8
184
23
1
0
PER
22
0
6
21
1
0
0
0
Register Description
0
0
BM
0
2
PEB 3456 E
MS
0
1
05.2001
16
0
0
0