peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 361

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

INV
RIFTF
BFE
BRM
BRAC
RAL2
Data Sheet
Invert data input from Receive Framer
This bit enables data inversion between receive framer and receive
signalling controller.
0
1
Report Interframe Time-fill Change
This bit selects, that interframe time-fill changes should be reported.
0
1
Enable BOM Filter Mode
This bit selects, that byte oriented messages have to be filtered. The
BOM is reported only if 7 out 10 data is received. This bit is valid in BOM
mode only.
0
1
BOM Receive Mode
This bit switches continuous and 10 byte packet reception of the receive
signalling controller. This bit is valid in BOM mode only.
0
1
BOM Receiver Active
T1: ESF
This bit switches the BOM receiver to operational state (on) or
inoperational state (off). When BOM Receiver is switched on, an
automatic switching between HDLC mode and BOM mode is enabled. If
eight or more consecutive ’1’s are detected, the BOM mode is entered.
Upon detection of a flag in the data stream, the signalling controller
switches back to HDLC mode.
0
1
Receive Address Low Byte 2 Valid
This bit enables byte RAL.RAL2 for address comparison.
0
1
Disable data Inversion.
Enable data inversion.
Disable IFF status messages.
Enable IFF status messages.
Disable BOM filter mode.
Enable BOM filter mode.
Enable continuous reception.
Enable 10 bytes packets.
Switch BOM receiver off.
Switch BOM receiver on.
Disable
Enable
361
Register Description
PEB 3456 E
05.2001