peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 332

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

TPRBSC
T1/E1 Transmit PRBS Control Register
Access
Address
Reset Value
FPRBS
IPRBS
PRP
FPL
Data Sheet
FPRBS
15
0
0
: read/write
: 04
: 001F
Framed PRBS
This bit field enables framed or unframed transmission of the pseudo-
random bit sequence.
0
1
Invert PRBS
This bit field enables inversion of the pseudo-random bit sequence in
transmit direction.
0
1
Pseudo-Random Pattern
This bit field determines the generator polynomial for the pseudo-
random bit sequence.
00
01
1-
Fixed Pattern Length
This bit field sets the length of the fixed pattern FP which is located in
register TFPR0 and TFPR1. E.g.: FPL(4:0) = 10010
length is equal to 19, which implies that the bits FP(18)..FP(0) form the
PRBS.
IPRBS
B
B
B
12
H
H
Transmit framed PRBS.
Transmit unframed PRBS.
PRBS is not inverted.
PRBS is inverted.
PRBS is generated according to 2
PRBS is generated according to 2
For PRBS the fixed pattern, defined in TFPR0 and TFPR1, is
selected.
0
0
PRP(1:0)
9
8
332
0
0
0
15
20
-1 (ITU-T O. 151)
-1 (ITU-T O. 151)
4
Register Description
FPL(4:0)
B
means pattern
PEB 3456 E
05.2001
0