peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 230

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

TSAD
Time slot Assignment Data Register
Access
Address
Reset Value
Note: The time slot assignment data register assigns a channel and a mask to a specific
The time slot assignment has to be done before a specific channel is configured for
operation. After operation the port/time slot assignment of a particular channel has to be
set to inhibit.
INHIBIT
TMA1ST
CHAN
Data Sheet
31
15
0
port/time slot combination. The related port/time slot must be chosen by accessing
TSAIA.
0
0
: read/write
: 074
: 02000000
Inhibit Time slot
This bit disabled processing of the selected port/time slot.
0
1
TMA First
This bit marks the first time slot belonging to a TMA superchannel for
TMA synchronization. Receiver starts processing data on the marked
time slot. In transmit direction data transmission is started on the marked
time slot. If TMA channel uses only one time slot this bit must be set.
Channel Number
This bit field selects the channel number which will be associated to the
port and time slot which is selected in register TSAIA.
CHAN(7:0)
0
H
The time slot is enabled.
The time slot is disabled. In receive direction incoming octets are
discarded. In transmit direction the octet of this time slot and port
is set to FF
0
H
0
INHI
H
BIT
25
.
TMA
1ST
24
8
230
0
7
0
0
MASK(7:0)
0
Register Description
0
0
PEB 3456 E
0
05.2001
0
0