peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 282

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

D3RESIM
DS3 Receive Error Simulation Register
Access
Address
Reset Value
FTMR
ESIMC
Data Sheet
15
0
0
0
: read/write
: 1CC
: 0000
Fast Timer
This bit enables alarm timer test function (manufacturing test only).
0
1
Error Simulation Code
This bit enables error simulation. During error simulation the device
generates error interrupts and error status messages. Nevertheless the
service is not affected.
0
1
2
3
4
5
6
7
0
H
H
Normal Operation
Test Operation
DS3 RED/AIS/Idle timer period reduced by 56.
DS2 READ/AIS timer period reduced by 24.
Second interrupt period reduced to 140 sec
Normal operation (no error simulation).
Simulate one F-bit error/multiframe (106 sec).
Simulate M-bit error in every other multiframe.
Simulate FEBE event/multiframe (106 sec).
Simulate P/CP event/multiframe (106 sec).
Simulate Loss of DS3 input (all zeros).
Simulate B3ZS code violations.
Simulate Loss of Receive Clock
(PCI), 66
0
0
H
(Local bus)
0
0
282
0
0
0
FTMR
4
Register Description
0
2
PEB 3456 E
ESIMC(2:0)
05.2001
0