peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 34

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

Data Sheet
T1
R4
R3
AC13
Pin No.
GNT
CLK
RST
INTA
Symbol
Output (O)
Input (I)
o/d
I
I
I
34
Grant
This signal is asserted by the arbiter to
grant control of the PCI to the TE3-
CHATT in response to a bus request via
REQ. After GNT is asserted, the TE3-
CHATT will begin a bus transaction only
after
deasserted the FRAME signal.
GNT is sampled on the rising edge of
CLK.
Clock
Provides timing for all PCI transactions.
Most PCI signals are sampled or output
relative to the rising edge of CLK. The PCI
clock is used as internal system clock.
The maximum CLK frequency is 66 MHz.
Reset
An active RST signal brings all PCI
registers, sequencers and signals into a
consistent state. All PCI output signals
are driven to high impedance.
Interrupt Request
When an interrupt status is active and
unmasked, the TE3-CHATT activates this
open-drain output.
the
current
Function
bus
Pin Description
PEB 3456 E
Master
05.2001
has